Processors and memories used in a high-end server or the like may, in some cases, use a laminated semiconductor chip in which a plurality of semiconductor chips are laminated for performance enhancement. As illustrated in FIG. 12, terminals (microbumps) 104 are formed on a semiconductor chip 101. The terminals 104 include copper columns (Cu posts or Cu pillars) 102 and solder 103 formed on top of copper columns 102. Thus, a method is used in which the terminals 104 of a plurality of semiconductor chips 101 are joined to laminate the plurality of semiconductor chips 101.
In order to ensure junction reliability after the plurality of semiconductor chips 101 are laminated, pasty or filmy reinforcing resin 105 is supplied onto each semiconductor chip 101, as illustrated in FIG. 13. Pasty reinforcing resin 105 is also referred to as NCP (Non-conductive Paste), whereas filmy reinforcing resin 105 is also referred to as an NCF (Non-conductive Film). As illustrated in FIG. 14, a semiconductor chip 101A is sucked from a suction hole 202 of a head 201 of a semiconductor mounting apparatus, such as a flip-chip bonder. A semiconductor chip 101B on which a plurality of terminals 104B are formed is disposed below the semiconductor chip 101A. Next, the semiconductor chip 101A is pressurized with the head 201, while heating the semiconductor chip 101A, to break through the reinforcing resin 105 by the terminals 104A of the semiconductor chip 101A, as illustrated in FIG. 15. The terminals 104A of the semiconductor chip 101A and the terminals 104B of the semiconductor chip 101B are thus joined to ensure electrical conduction between the semiconductor chip 101A and the semiconductor chip 101B and the rigidity of the chips.    [Patent document 1] Japanese Laid-open Patent Publication No. 2015-18897    [Patent document 2] Japanese Laid-open Patent Publication No. 2011-66027    [Patent document 3] Japanese Laid-open Patent Publication No. 2000-332390    [Patent document 4] Japanese Laid-open Patent Publication No. 2001-230528